基于TMS320C30的多处理器通信技术研究

针对弹载图像处理机的任务要求 ,自行设计了一套基于 TMS3 2 0 C3 0的多处理器系统 ,并在此基础上 ,根据多处理器系统的结构特点 ,提出了两种有效的通信方式 :(1 )主控器与处理单元之间基于串行口的握手通信方式 ;(2 )处理单元之间基于双口 RAM的信箱通信方式。实验证明 ,系统采用这两种方式通信 ,具有可靠、高速等特点 ,完全满足弹载图像处理机的通信要求。     

一种新型数据记录仪的设计与应用

提出了一种基于PDA的新型数据记录仪的设计方案。以 89c52单片机为核心设计了前端数据采集器 ,开发了基于PDA的数据记录应用程序。应用实验表明 ,该方案是可行的     

单片机在立体升降库系统中的应用

介绍了以单片机为控制核心 ,实现在立体升降库中取货、送货的控制方法 ,以及库存空间调整的算法。叙述了控制系统的功能特点、硬件和软件的设计思想     

H-BSP: A Hierarchical BSP Computation Model

This paper presents a new parallel computing model, called H-BSP, which adds a hierarchical concept to the BSP(Bulk Synchronous Parallel) computing model. An H-BSP program consists of a number of BSP groups which are dynamically created at run time and executed in a hierarchical fashion. H-BSP allows algorithm designers to develop more efficient algorithms by utilizing processor locality in the program. Based on the distributed memory model, H-BSP provides a group-based programming paradigm and supports Divide & Conquer algorithms efficiently. This paper describes the structure of the H-BSP model, complexity analysis and some examples of H-BSP algorithm. Also presented is the performance characteristics of H-BSP algorithms based on the simulation analysis. Simulation results show that H-BSP takes advantages of processor locality and performs well in low bandwidth networks or in a constant-valence architecture such as 2-dimensional mesh. It is also proved that H-BSP can predict algorithm performance better than BSP, due to its locality-preserving nature.     

Bounded Model Checking Using Satisfiability Solving

The phrase model checking refers to algorithms for exploring the state space of a transition system to determine if it obeys a specification of its intended behavior. These algorithms can perform exhaustive verification in a highly automatic manner, and, thus, have attracted much interest in industry. Model checking programs are now being commercially marketed. However, model checking has been held back by the state explosion problem, which is the problem that the number of states in a system grows exponentially in the number of system components. Much research has been devoted to ameliorating this problem.In this tutorial, we first give a brief overview of the history of model checking to date, and then focus on recent techniques that combine model checking with satisfiability solving. These techniques, known as bounded model checking, do a very fast exploration of the state space, and for some types of problems seem to offer large performance improvements over previous approaches. We review experiments with bounded model checking on both public domain and industrial designs, and propose a methodology for applying the technique in industry for invariance checking. We then summarize the pros and cons of this new technology and discuss future research efforts to extend its capabilities.     

超声波汽车追尾仪的研究

在能见度较低情况下,如何避免高速公路上汽车追尾是个急待解决的问题,提出了以单片机为核心的微机控制系统,利用超声波的特性来测量两车前后相对距离,介绍了超声波测距原理、系统的硬件和软件设计,很好地解决了汽车追尾问题。     

数字式无线扩音系统研究

利用TMS320VC5402数字信号处理器对语音信号进行数字化处理及无线传输,研制出数字式无线扩音系统,该系统工作稳定可靠,价格低廉。介绍的无线传输技术非常适用于那些要求体积小、低功能、低价格的短距离无线数据传送场合。     

红外传感器应用时的自动零位跟踪

热敏型红外传感器被用在温度一维分布测量系统中 ,使用时将传感器接入由数字电位器及电阻器组成的电桥中。通过单片机直接控制数字电位器 ,实现了传感器零位的自动跟踪 ,成功地解决了传感器的直流漂移问题     

Algorithmic and architectural design for real-time and power-efficient Retinex image/video processing

This paper presents novel algorithmic and architectural solutions for real-time and power-efficient enhancement of images and video sequences. A programmable class of Retinex-like filters, based on the separation of the illumination and reflectance components, is proposed. The dynamic range of the input image is controlled by applying a suitable non-linear function to the illumination, while the details are enhanced by processing the reflectance. An innovative spatially recursive rational filter is used to estimate the illumination. Moreover, to improve the visual quality results of two-branch Retinex operators when applied to videos, a novel three-branch technique is proposed which exploits both spatial and temporal filtering. Real-time implementation is obtained by designing an Application Specific Instruction-set Processor (ASIP). Optimizations are addressed at algorithmic and architectural levels. The former involves arithmetic accuracy definition and linearization of non-linear operators; the latter includes customized instruction set, dedicated memory structure, adapted pipeline, bypasses, custom address generator, and special looping structures. The ASIP is synthesized in standard-cells CMOS technology and its performances are compared to known Digital signal processor (DSP) implementations of real-time Retinex filters. As a result of the comparison, the proposed algorithmic/architectural design outperforms state-of-art Retinex-like operators achieving the best trade-off between power consumption, flexibility, and visual quality.

Real-Time MPEG-2 Video Codec System Using Multiple Digital Signal Processors

A real-time MPEG-2 video codec system, called the KAIST image computing system (KICS), was developed using multiple multimedia video processors (MVP, TMS320C80). The number of computations and optimum implementation of the MPEG-2 algorithm were analyzed for real-time processing. An MVP simulator was used to perform the timing analysis for the real-time MPEG-2 encoding and decoding, and it verified the design of the KICS. Task partitioning and mapping of the MPEG-2 algorithm to multiple MVPs were performed based on load-balancing, minimum data I/O, and the properties of the MVP. The KICS uses five MVPs for MPEG-2 real-time encoding of a main profile at the main level whereas it uses three MVPs for real-time decoding.